The effects of signal layer positions in multi-layer PCB designs

Author

Fan, Jun ; Knighten, James L. ; Smith, Norman W. ; Alexander, Ray ; Dressier, D.

Author_Institution

NCR Corp., San Diego, CA, USA

Volume

1

fYear

2002

fDate

19-23 Aug. 2002

Firstpage

320

Abstract

In a high-speed multi-layer PCB (printed circuit board) design with multiple power layers, signal trace placement can be an important issue. Studies on a multi-layer test board are reported in this work. Single-ended high-speed signals that use the power layers as reference (return) may suffer extra loss in some frequency ranges due to the displacement current path from the power layer to ground. "Reference" capacitors are recommended as a solution to mitigate this effect. Differential traces do not suffer this extra loss. However, transmission loss and mode conversion of a differential trace may be affected by its layer position. The traces immediately adjacent to the ground layer showed the best performance in this particular test board.

Keywords

S-parameters; electromagnetic wave transmission; losses; printed circuit design; printed circuit testing; 2.5 V; 3.3 V; 5 V; differential trace; displacement current path; mode conversion; multi-layer PCB designs; multi-layer test board; multiple logic levels; multiple power layers; printed circuit board; reference capacitors; s-parameter measurements; signal layer positions; signal trace placement; single-ended high-speed signals; transmission loss; Calibration; Capacitors; Circuit testing; Dielectric measurements; Power transmission lines; Printed circuits; Propagation losses; Scattering parameters; Signal design; Transmission line measurements;

fLanguage

English

Publisher

ieee

Conference_Titel

Electromagnetic Compatibility, 2002. EMC 2002. IEEE International Symposium on

Conference_Location

Minneapolis, MN, USA

Print_ISBN

0-7803-7264-6

Type

conf

DOI

10.1109/ISEMC.2002.1032496

Filename

1032496