Design and Implementation of a 2-level FSK Digital Modems Using CORDIC Algorithm

Author

Cui, Xiaoxin ; Yu, Dunshan ; Sheng, Shimin ; Cui, Xiaole

Author_Institution

Inst. of Microelectron., Peking Univ., Beijing

fYear

2006

fDate

4-7 Dec. 2006

Firstpage

1753

Lastpage

1756

Abstract

A 2-level FSK digital modems with CORDIC algorithm for family network is presented. The noncoherent detector is designed based on counting the zero crossings using new noise elimination technique. Synchronization control information is extracted from the magnitude signal through setting protection parameters. The output BER is 0.01% for input SNR of 1dB with frequency offset of 0.1MHz. The design is implemented with Xilinx VirtexII XC2V1000-4FG256 FPGA

Keywords

digital arithmetic; field programmable gate arrays; frequency shift keying; modems; 2-level FSK digital modems; CORDIC algorithm; Xilinx VirtexII XC2V1000-4FG256 FPGA; field programmable gate arrays; frequency shift keying; noise elimination; noncoherent detector; synchronization control information; zero crossings; Algorithm design and analysis; Bit error rate; Data mining; Detectors; Field programmable gate arrays; Frequency shift keying; Frequency synchronization; Modems; Protection; Signal to noise ratio; 2FSK; CORDIC; CPFSK; digital modems;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on

Conference_Location

Singapore

Print_ISBN

1-4244-0387-1

Type

conf

DOI

10.1109/APCCAS.2006.342157

Filename

4145751