DocumentCode
2249205
Title
Power Management in Circuits Design
Author
Yang, Tianchi ; JIN, Liang ; Chen, Juan
Author_Institution
Nat. Digital Switch Center, Zhengzhou
fYear
2006
fDate
4-7 Dec. 2006
Firstpage
1757
Lastpage
1759
Abstract
Proper power management mechanism is important when designing circuits. It is helpful to reduce power consumption and improve the circuit performance. This low power circuit model adopts five-layer architecture, which are hardware platform, driver layer, operating system, power manage mechanism and application program. Dynamic power management (DPM) technology is also introduced to solve the problem of power consumption. The experiment on embedded system demonstrates that this power management mechanism is feasible
Keywords
driver circuits; embedded systems; low-power electronics; network synthesis; circuit design; driver layer; dynamic power management; embedded operating system; hardware platform; low power circuit model; Circuit optimization; Circuit synthesis; Driver circuits; Energy consumption; Energy management; Hardware; Operating systems; Power system management; Power system modeling; Technology management; DPM; embedded operating system; power management;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location
Singapore
Print_ISBN
1-4244-0387-1
Type
conf
DOI
10.1109/APCCAS.2006.342158
Filename
4145752
Link To Document