Perspectives and issues in 3D-IC from designers´ point of view

Author

Fujita, Shinobu ; Abe, Keiko ; Nomura, Kumiko ; Yasuda, Shin Ichi ; Tanamoto, Tetsufumi

Author_Institution

Adv. LSI Technol. Lab., Toshiba Corp., Kawasaki, Japan

fYear

2009

fDate

24-27 May 2009

Firstpage

73

Lastpage

76

Abstract

Recent progress of through-silicon-via (TSV) process is so impressive that everyone can expect real 3D-IC era. The most valuable advantages of 3D-IC is decreasing interconnects. Although analysis of this advantages has been reported in some specific case study, the general theory for quantitative analysis has not been studied. In some cases, the advantage of 3D-IC has been overestimated and much different from that of real chip designs expected. This paper presents the qualitative analysis of general 3D-IC design especially for sub-65nm CMOS generation from designers´ point of view. What is understood from this paper is how important IC-design is for 3D-IC and how to gain a big advantage of 3D-IC.

Keywords

CMOS integrated circuits; integrated circuit design; integrated circuit interconnections; 3D-IC design; CMOS generation; qualitative analysis; quantitative analysis; size 65 nm; through-silicon-via process; CMOS technology; Circuit optimization; Delay effects; Density functional theory; Frequency; Integrated circuit interconnections; Large scale integration; Repeaters; Three-dimensional integrated circuits; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on

Conference_Location

Taipei

Print_ISBN

978-1-4244-3827-3

Electronic_ISBN

978-1-4244-3828-0

Type

conf

DOI

10.1109/ISCAS.2009.5117688

Filename

5117688