DocumentCode :
2249777
Title :
A production based system for formal verification of digital signal processing architectures
Author :
Elleithy, Khled A. ; Aref, Mostafa A.
Author_Institution :
King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
fYear :
1993
fDate :
1-3 Nov 1993
Firstpage :
1618
Abstract :
A new formal hardware verification approach for digital signal processing architectures based on a production system environment is introduced. The PROVER system (PROduction system for hardware VERification) is implemented using CLIPS (C Language Integrated Production System). A cell library of different hardware components has been implemented. Components in the cell library are described at the transistor level, circuit level, gate level, logical level, and functional level. An example of carry select adder using PROVER is given
Keywords :
C language; circuit CAD; formal verification; intelligent design assistants; signal processing; specification languages; C Language Integrated Production System; CLIPS; PROVER system; carry select adder; cell library; circuit level; digital signal processing architectures; formal hardware verification; functional level; gate level; logical level; production based system; transistor level; Adders; Circuits; Digital signal processing; Formal verification; Hardware; Logic; Petroleum; Production systems; Signal processing algorithms; Software libraries; Specification languages; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 1993. 1993 Conference Record of The Twenty-Seventh Asilomar Conference on
Conference_Location :
Pacific Grove, CA
ISSN :
1058-6393
Print_ISBN :
0-8186-4120-7
Type :
conf
DOI :
10.1109/ACSSC.1993.342291
Filename :
342291
Link To Document :
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