High-speed bipolar MUX modeling and design

Author

Alioto, Massimo ; Palumbo, Gaetano

Author_Institution

Dipt. Elettrico, Elettronico e Sistemistico, Catania Univ., Italy

Volume

5

fYear

2000

fDate

2000

Firstpage

1

Abstract

This paper presents modeling and optimized design of Current Mode Logic (CML) MUX. Propagation delay models with few terms are presented. The most accurate model has errors lower than 2%. By using the proposed models a design optimization is proposed. In particular, the bias currents which gives the minimum propagation delay are found. Moreover, it is demonstrated that at the cost of a 10% increase in propagation delay a 40% reduction in the power dissipation can be achieved. The models and design strategies are validated using both a traditional and a high-speed bipolar process which have a transition frequency equal to 6 GHz and 20 GHz, respectively

Keywords

bipolar logic circuits; circuit optimisation; current-mode logic; delays; high-speed integrated circuits; integrated circuit design; integrated circuit modelling; multiplexing equipment; 20 GHz; 6 GHz; CML MUX; bias currents; current mode logic; design optimization; high-speed bipolar MUX; high-speed bipolar process; minimum propagation delay; modeling; optimized design; power dissipation reduction; propagation delay models; transition frequency; Circuits; Costs; Design optimization; Inverters; Logic design; Parasitic capacitance; Power dissipation; Power system modeling; Propagation delay; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on

Conference_Location

Geneva

Print_ISBN

0-7803-5482-6

Type

conf

DOI

10.1109/ISCAS.2000.857348

Filename

857348