DocumentCode :
2250264
Title :
Primitive operator digital filter synthesis using a shift biased algorithm
Author :
Bull, D.R. ; Horrocks, D.H.
Author_Institution :
Dept. of Electr. & Electron. Eng., Univ. Coll., Cardiff, UK
fYear :
1988
fDate :
7-9 June 1988
Firstpage :
1529
Abstract :
A graph-based synthesis technique has been developed which allows digital filters to be realized with significantly reduced numbers of primitive arithmetic operations. Previously presented work has relied on the use of unity-gain graph edges. These methods are extended by the authors to permit the inclusion of edges with gains which may assume any power of two. This facilitates a tradeoff between addition or subtraction and shift operations which can be beneficial in many implementations. For VLSI implementations especially, judicious placement of processing elements, routing, and allocation of pipeline registers, make for an efficient filter implementation.<>
Keywords :
digital filters; graph theory; network synthesis; VLSI implementations; digital filter synthesis; graph-based synthesis technique; primitive arithmetic operations; shift biased algorithm; Arithmetic; Clocks; Delay; Digital filters; Finite impulse response filter; Hardware; Registers; Throughput; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location :
Espoo, Finland
Type :
conf
DOI :
10.1109/ISCAS.1988.15221
Filename :
15221
Link To Document :
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