Analog implementation of SNR based gain adaptation for denoising

In the current work, a novel analog hardware to denoise speech signals has been proposed and simulated in 0.5 mum VLSI technology. The system is based on Automatic Gain Control which suppresses the noisy parts while boosting clean intervals of a signal. Further, the architecture is devised using Operational Transconductance Amplifiers (OTA) operating in sub-threshold region for attaining high programmability, low power and also to facilitate testing on an RASP 2.7 FPAA Prototype. A test noisy signal of 5 dB SNR when applied to the system resulted in a 13.5 dB improved output SNR consuming 0.53 mW power from a 1.6 V supply.