Optimizing bandwidth power efficiency of a CMOS transconductor

Author

Guo, N. ; Raut, R.

Author_Institution

Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada

Volume

5

fYear

2000

fDate

2000

Firstpage

205

Abstract

A novel figure of merit to describe the bandwidth power efficiency of CMOS transconductors-g_ac/P_diss is proposed. The analytical g_ac/P_diss expressions of cross-coupled differential pair transconductor are derived and optimized in two different ways: univariable unconstrained and multivariable constrained optimization. Linearity characteristic of the optimally biased transconductor is also studied for every possible transconductance expression. The analytical results are verified by numerical and HSPICE simulation results

Keywords

CMOS analogue integrated circuits; SPICE; circuit optimisation; integrated circuit design; CMOS cross-coupled differential pair transconductor; HSPICE; bandwidth power efficiency; figure of merit; linearity; multivariable constrained optimization; numerical simulation; univariable unconstrained optimization; Analytical models; Bandwidth; Capacitance; Constraint optimization; Energy consumption; Linearity; Numerical simulation; Optimization methods; Transconductance; Transconductors;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on

Conference_Location

Geneva

Print_ISBN

0-7803-5482-6

Type

conf

DOI

10.1109/ISCAS.2000.857399

Filename

857399