10 Gb/s SerDes for Bidirectional Chip-to-Memory Optical Interconnection

Author

Nga, Nguyen Thi Hang ; Lee, Min Hyuk ; Lee, Tae-Woo ; Park, Hyo-Hoon

Author_Institution

Opt. Interconnection & Switching Lab., Inf. & Commun. Univ., Daejeon

fYear

2007

fDate

26-31 Aug. 2007

Firstpage

1

Lastpage

2

Abstract

A new hybrid serializer/deserializer (SerDes) of shift-register and tree structures is proposed. Shared common blocks between multiplexer/demultiplexer (Mux/Demux) on a single chip save power of 63% and 37% in Mux/Demux mode respectively compared to using separate chips. The chip is simulated in a 0.18 mum CMOS technology, operates up to 10 Gb/s.

Keywords

CMOS logic circuits; integrated memory circuits; integrated optoelectronics; low-power electronics; optical computing; optical interconnections; optical storage; shift registers; tree data structures; CMOS technology; bidirectional chip-to-memory optical interconnection; bit rate 10 Gbit/s; hybrid serializer-deserializer; multiplexer-demultiplexer; shared common blocks; shift register; size 0.18 mum; tree structures; CMOS technology; Central Processing Unit; Circuit simulation; Communication switching; Multiplexing; Optical computing; Optical fiber communication; Optical interconnections; Registers; Tree data structures;

fLanguage

English

Publisher

ieee

Conference_Titel

Lasers and Electro-Optics - Pacific Rim, 2007. CLEO/Pacific Rim 2007. Conference on

Conference_Location

Seoul

Print_ISBN

978-1-4244-1173-3

Electronic_ISBN

978-1-4244-1174-0

Type

conf

DOI

10.1109/CLEOPR.2007.4391730

Filename

4391730