DocumentCode
2251995
Title
An implicit method for hazard-free two-level logic minimization
Author
Theobald, Michael ; Nowick, Steven M.
Author_Institution
Dept. of Comput. Sci., Columbia Univ., New York, NY, USA
fYear
1998
fDate
30 Mar-2 Apr 1998
Firstpage
58
Lastpage
69
Abstract
None of the available minimizers for exact 2-level hazard-free logic minimization can synthesize very large circuits. This limitation has forced researchers to resort to heuristic minimization, or to manual and automated circuit partitioning techniques. This paper introduces a new implicit 2-level logic minimizer, IMPYMIN, which is able to solve very large multi-output hazard-free minimization problems exactly. The minimizer is based on a novel theoretical approach: it incorporates hazard-freedom constraints within a synchronous function by adding new variables. In particular, the generation of dynamic-hazard-free prime implicants is cast as a synchronous prime implicant generation problem. The minimizer can exactly solve all currently available examples, which range up to 32 inputs and 33 outputs, in less than 813 seconds. These include examples that have never been exactly solved before
Keywords
logic design; logic partitioning; minimisation of switching nets; IMPYMIN; automated circuit partitioning; hazard-free two-level logic minimization; hazard-freedom constraints; heuristic minimization; implicit 2-level logic minimizer; implicit method; synchronous prime implicant generation problem; Algorithm design and analysis; Boolean functions; Communication system control; Computer science; Data structures; Design automation; Logic circuits; Manuals; Minimization methods; Synchronous generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Research in Asynchronous Circuits and Systems, 1998. Proceedings. 1998 Fourth International Symposium on
Conference_Location
San Deigo, CA
Print_ISBN
0-8186-8392-9
Type
conf
DOI
10.1109/ASYNC.1998.666494
Filename
666494
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