Design methodology for Booth-encoded Montgomery module design for RSA cryptosystem

Author

Leu, Jye-Jong ; Wu, An-Yeu

Author_Institution

Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan

Volume

5

fYear

2000

fDate

2000

Firstpage

357

Abstract

In this paper, a design methodology for the design of a Montgomery module is proposed. We summarize the result in pseudo C-like codes and call it Booth-encoded Montgomery modular multiplication algorithm. Using this algorithm, iteration number is reduced to about n/2 in each Montgomery operation. In addition, we apply the folding and unfolding techniques to shorten the critical path. Finally, we propose the 4 bit-digit-serial pipelined architecture to process RSA encryption/decryption in a more efficient way. The speed of the proposed algorithm is approximately 1.7 times that of most RSA VLSI designs based on original Montgomery modular multiplication algorithm

Keywords

VLSI; iterative methods; multiplying circuits; pipeline processing; public key cryptography; Booth-encoded Montgomery module design; RSA cryptosystem; digit-serial pipelined architecture; folding techniques; iteration number; modular multiplication algorithm; pseudo C-like codes; unfolding techniques; Algorithm design and analysis; Computer hacking; Computer networks; Data security; Design methodology; Hardware; Protection; Public key cryptography; Telephony; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on

Conference_Location

Geneva

Print_ISBN

0-7803-5482-6

Type

conf

DOI

10.1109/ISCAS.2000.857438

Filename

857438