• DocumentCode
    2252371
  • Title

    Energy-aware fetch mechanism: trace cache and BTB customization

  • Author

    Chaver, Daniel ; Rojas, Miguel A. ; Pinuel, Luis ; Prieto, Manuel ; Tirado, Francisco ; Huang, Michael C.

  • Author_Institution
    Dpto. Arquitectura de Computadores, Univ. Complutense, Madrid, Spain
  • fYear
    2005
  • fDate
    8-10 Aug. 2005
  • Firstpage
    42
  • Lastpage
    47
  • Abstract
    A highly-efficient fetch unit is essential not only to obtain good performance but also to achieve energy efficiency. However, existing designs are inflexible and depending on program behavior, can be either insufficient or an overkill. We introduce a phase-based adaptive fetch mechanism that can be dynamically adjusted based on feedback information of the program behavior. This design adds very little hardware complexity and relegates complex tasks to the software components. It is also very effective: saving 26.8% and 34.1% fetch energy on average compared with a conventional and a trace cache-based fetch unit, respectively. At the same time, performance is improved by 5.7% and 0.6%, respectively.
  • Keywords
    adaptive scheduling; cache storage; multiprocessing systems; processor scheduling; BTB customization; branch prediction; energy-aware fetch mechanism; phase-based adaptive fetch mechanism; trace cache; Computer architecture; Costs; Delay; Energy consumption; Energy efficiency; Feedback; Hardware; High performance computing; Modems; Permission;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Low Power Electronics and Design, 2005. ISLPED '05. Proceedings of the 2005 International Symposium on
  • Print_ISBN
    1-59593-137-6
  • Type

    conf

  • DOI
    10.1109/LPE.2005.195483
  • Filename
    1522732