• DocumentCode
    2252437
  • Title

    An O(n) Residue Number System to Mixed Radix Conversion technique

  • Author

    Gbolagade, Kazeem Alagbe ; Cotofana, Sorin Dan

  • Author_Institution
    Comput. Eng. Lab., Delft Univ. of Technol., Delft, Netherlands
  • fYear
    2009
  • fDate
    24-27 May 2009
  • Firstpage
    521
  • Lastpage
    524
  • Abstract
    This paper investigates the conversion of residue number system (RNS) operands to decimal, which is an important issue concerning the utilization of RNS numbers in digital signal processing applications. In this line of reasoning, we introduce an RNS to mixed radix conversion (MRC) technique, which addresses the computation of mixed radix (MR) digits in such a way that enables the MRC parallelization. Given an RNS with the set of relatively prime integer moduli {mi}i=1;n, the key idea behind the proposed technique is to maximize the utilization of the modulo-mi adders and multipliers present in the RNS processor functional units. For an n-digit RNS number X = (x1; x2; x3;hellip; xn) the method requires n iterations. However, at iteration i, the modulo-mi units are utilized for the calculation of the MR digit ai, while the other modulo units are calculating intermediate results required in further iterations. Our approach results in an RNS to MRC with an asymptotic complexity, in terms of arithmetic operations, in the order of O(n), while state of the art MRCs exhibit an asymptotic complexity in the order of O(n2). More in particular, when compared with the best state of the art MRC, our technique reduces the number of arithmetic operations by 5:26% and 38:64% for moduli set of length four and ten, respectively.
  • Keywords
    adders; computational complexity; multiplying circuits; parallel algorithms; residue number systems; RNS processor functional unit; arithmetic operation; asymptotic complexity; digital signal processing application; integer number system; iteration method; mixed radix conversion algorithm; modulo adder; modulo multiplier; parallel MRC algorithm; prime integer moduli; residue number system; Application software; Arithmetic; Cathode ray tubes; Concurrent computing; Data conversion; Digital signal processing; Dynamic range; Image converters; Laboratories; Proposals; Data Conversion; Mixed Radix Conversion; Mixed Radix Digits; Residue Number System; arithmetic operations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4244-3827-3
  • Electronic_ISBN
    978-1-4244-3828-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.2009.5117800
  • Filename
    5117800