Title :
Gold stud bump in flip-chip applications
Author_Institution :
Palomar Technol. Inc., Vista, CA, USA
Abstract :
As power requirements and operating frequencies increase, more and more designs will look toward ball bumps as an interconnect solution. While solder has traditionally been the incumbent material for these bumps, solder´s limitations have become manufacturing and performance limitations. As a result, packaging designers are looking toward gold bumps as a strong contender in the first-level interconnect battle. This paper briefly discusses the limitations of the solder connection process and compares that to the gold bump process. Furthermore, it describes the four leading alternatives for achieving gold bump flip-chip connections.
Keywords :
flip-chip devices; gold; integrated circuit interconnections; integrated circuit packaging; microassembling; soldering; ball bump interconnects; flip-chip applications; gold bump first-level interconnects; gold bump flip-chip connection; gold bump process; gold stud bump; manufacturing limitations; operating frequencies; packaging design; performance limitations; power requirements; solder connection process limitations; Bonding; Frequency; Gold; Inductance; Integrated circuit interconnections; Lead; Manufacturing; Packaging; Switches; Wire;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2002. IEMT 2002. 27th Annual IEEE/SEMI International
Print_ISBN :
0-7803-7301-4
DOI :
10.1109/IEMT.2002.1032735