DocumentCode :
2253610
Title :
Elimination of polyimide stress buffer on integrated circuits using advanced packaging materials
Author :
Patten, David ; Phou, Jesse
Author_Institution :
Semicond. Products Sector, Motorola Inc., Austin, TX, USA
fYear :
2002
fDate :
2002
Firstpage :
195
Lastpage :
199
Abstract :
Polyimide is typically used as the final layer in silicon technology process integration. Its primary purpose is to protect the topside structures and relieve the interface of stresses introduced during and after encapsulation. However, developments in mold compound technology as well as in wafer fabrication techniques have caused the industry to re-evaluate the need for a polyimide stress buffer. Mold compound fillers have become finer and more spherical, reducing particulate pressure loading from the fillers on the die top surface. Additionally, the use of CMP in wafer fabrication reduces topographical variations, which result in less stress points on the die surface., This paper presents the evaluations that were conducted to assess the continued use of polyimide, and the effort made to eliminate if from some microelectronic packages. Moisture characterization data for several MAPBGA packages are included and package performance without polyimide is assessed. It was concluded that the removal of polyimide from these devices does not significantly affect the yields, but more work needs to be done to realize the limitations.
Keywords :
ball grid arrays; integrated circuit packaging; internal stresses; moisture; plastic packaging; polymer films; protective coatings; CMP; MAPBGA packages; Si; advanced packaging materials; encapsulation; interface stresses; microelectronic packages; moisture characterization data; mold compound fillers; package performance assessment; polyimide stress buffer elimination; silicon technology process integration; topographical variations reduction; topside structure protective coating; wafer fabrication techniques; Encapsulation; Fabrication; Integrated circuit packaging; Integrated circuit technology; Polyimides; Protection; Silicon; Stress; Surface topography; Textile industry;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2002. IEMT 2002. 27th Annual IEEE/SEMI International
Print_ISBN :
0-7803-7301-4
Type :
conf
DOI :
10.1109/IEMT.2002.1032753
Filename :
1032753
Link To Document :
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