DocumentCode
2253801
Title
Increasing PCM main memory lifetime
Author
Ferreira, Alexandre P. ; Zhou, Miao ; Bock, Santiago ; Childers, Bruce ; Melhem, Rami ; Mosse, Daniel
Author_Institution
Dept. of Comput. Sci., Univ. of Pittsburgh, Pittsburgh, PA, USA
fYear
2010
fDate
8-12 March 2010
Firstpage
914
Lastpage
919
Abstract
The introduction of Phase-Change Memory (PCM) as a main memory technology has great potential to achieve a large energy reduction. PCM has desirable energy and scalability properties, but its use for main memory also poses challenges such as limited write endurance with at most 107 writes per bit cell before failure. This paper describes techniques to enhance the lifetime of PCM when used for main memory. Our techniques are (a) writeback minimization with new cache replacement policies, (b) avoidance of unnecessary writes, which write only the bit cells that are actually changed, and (c) endurance management with a novel PCM-aware swap algorithm for wear-leveling. A failure detection algorithm is also incorporated to improve the reliability of PCM. With these approaches, the lifetime of a PCM main memory is increased from just a few days to over 8 years.
Keywords
cache storage; failure analysis; integrated circuit reliability; minimisation; phase change memories; PCM main memory lifetime; PCM-aware swap algorithm; cache replacement policies; endurance management; energy properties; energy reduction; failure detection algorithm; phase change memory; reliability; scalability properties; wear leveling; writeback minimization; Computer science; Costs; Degradation; Detection algorithms; Energy consumption; Minimization methods; Phase change materials; Phase change memory; Random access memory; Scalability;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4244-7054-9
Type
conf
DOI
10.1109/DATE.2010.5456923
Filename
5456923
Link To Document