A Prototype of Readout Electronics Based on an Unified Altera Platform for Underground Muon Counters Triggered by Surface Detectors

The paper describes the prototype of a synchronous (Master/Slave) data acquisition system for underground muon counters triggered by surface detectors. A water Cherenkov surface detector (Master) when hit by extensive air showers generates and transmits the trigger to the underground system (Slave) to register the muon fraction of the showers which survived the propagation through 3 m layer of soil. The surface and underground segments are built on the Altera field-programmable gate array (FPGA) CycloneIII/CycloneIV platforms, respectively. Both FPGAs are equipped with NIOS processors, which makes previously used external microcontrollers unnecessary. They also generate necessary interfaces: SDRAM controller, UART, SPI, DMA; interfaces which were previously implemented by means of logic elements. Moving several time-consuming tasks from the logic block (coded in the Altera Hardware Description Language) to the NIOS (coded in “C”) dramatically simplifies the system and increases its flexibility. The time margin for all processes managed by the soft-core NIOS for the 100 Hz T1 trigger rate remains sufficient. NIOS processors communicate with each other via UART protocol and by the RS485 standard. The underground CycloneIV FPGA is programmed remotely via additional MAXII CPLD with nonvolatile programmable memory. Tests have shown that a full string of data processing goes smoothly. The above-mentioned string involves the following processes: the transfer of the trigger with a time stamp from the surface detector into the underground segment via a dedicated line with a galvanic barrier, freezing data from 64 channels at 320 MHz sampling in internal DPRAMs, writing/reading data into/from external SDRAM, extracting physical data identified by GPS time stamps sent from Central Data Acquisition System (CDAS) and the data transfer from the underground NIOS via the surface NIOS to CDAS.