DocumentCode
2254222
Title
Low power design of the X-GOLD® SDR 20 baseband processor
Author
Raab, Wolfgang ; Berthold, Jörg ; Hachmann, Ulrich ; Langen, Dominik ; Schreiner, Michael ; Eisenreich, Holger ; Schluessler, Jens-Uwe ; Ellguth, Georg
Author_Institution
Infineon Technol. AG, Neubiberg, Germany
fYear
2010
fDate
8-12 March 2010
Firstpage
792
Lastpage
793
Abstract
The X-GOLD SDR 2x family of programmable baseband processors is designed for hosting multiple standards of mobile communication, connectivity, and reception of broadcast ser(R) vices. Processors from the X-GOLDw SDR 2x family obtain the necessary flexibility from a set of programmable SIMD (single-instruction, multiple-data) processor cores, which exchange data through shared on-chip memories. The processors are supported by few dedicated configurable hardware accelerators for those DSP tasks which require no or little flexibility, (R) by an ARMW core for the execution of the upper layers of the protocol stack and by standard IO-components.
Keywords
input-output programs; instruction sets; mobile communication; optimisation; shared memory systems; system-on-chip; IO components; SIMD; X-GOLD?? SDR 20 baseband processor; low power design; mobile communication; onchip memories; programmable baseband processors; single instruction multiple data; Baseband; Clocks; Communication standards; Delay; Energy consumption; Hardware; Power supplies; Synchronization; Threshold voltage; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4244-7054-9
Type
conf
DOI
10.1109/DATE.2010.5456945
Filename
5456945
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