DocumentCode
2254615
Title
Dual thresholding for digital wideband receivers with variable truncation scheme
Author
Lee, Yu-Heng George ; Chen, Chien-In Henry
Author_Institution
Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA
fYear
2009
fDate
24-27 May 2009
Firstpage
920
Lastpage
923
Abstract
A novel thresholding technique is presented for digital channelized receiver to minimize second signal false alarm. The additional constraint placed for signal detection improves the false alarm rate with minimal hardware increase due to the simplicity of the proposed algorithm. Preliminary dual-tone signal analysis with instantaneous dynamic range (IDR) from -12 to -20 dB shows favorable second signal detection rates with no false alarms reported based on 53760 samples per test. The implemented digital receiver samples at 2.048 GHz on Xilinx Virtex 4 field programmable gate array (FPGA) with output throughput rate of 62.5 ns. Exhaustive evaluation of fifty-eight 16 MHz channels includes signals not centered on the frequency bin, which also shows favorable detection results.
Keywords
broadband networks; field programmable gate arrays; radio receivers; signal detection; FPGA; Xilinx Virtex 4 field programmable gate array; digital channelized receiver; digital wideband receivers; dual thresholding; dual-tone signal analysis; frequency 16 MHz; frequency 2.048 GHz; instantaneous dynamic range; second signal false alarm minimization; variable truncation scheme; Dynamic range; Field programmable gate arrays; Frequency; Hardware; Kernel; Signal design; Signal detection; Signal processing; Signal resolution; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location
Taipei
Print_ISBN
978-1-4244-3827-3
Electronic_ISBN
978-1-4244-3828-0
Type
conf
DOI
10.1109/ISCAS.2009.5117907
Filename
5117907
Link To Document