Title :
CMOS outlier rejection circuit
Author :
Vlassis, S. ; Siskos, S.
Author_Institution :
Dept. of Phys., Aristotle Univ. of Thessaloniki, Greece
Abstract :
In this work an analog CMOS outlier rejection circuit is proposed. The circuit calculates the instantaneous average current of an array of N analog input currents rejecting the outliers which lie outside of a desired percentage of the average current. The output of the circuit is the average current. The circuit is constructed by N identical cells which select the low and high outliers and an average circuit. The circuit finds many applications in parallel processing of the miniaturized sensor array signals
Keywords :
CMOS analogue integrated circuits; analogue processing circuits; signal processing equipment; analog CMOS outlier rejection circuit; analog input currents; identical cells; instantaneous average current; miniaturized sensor array signals; parallel processing; Analog circuits; CMOS analog integrated circuits; Chemical sensors; Fabrication; Laboratories; Parallel processing; Physics; Sensor arrays; Sensor systems; Signal processing;
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
DOI :
10.1109/ISCAS.2000.857605
