DocumentCode :
2255474
Title :
Parallel HD encoding on CELL
Author :
He, Xun ; Fang, Xiangzhong ; Wang, Ci ; Goto, Satoshi
Author_Institution :
SEIEE of Shanghai Jiao Tong Univ., Shanghai, China
fYear :
2009
fDate :
24-27 May 2009
Firstpage :
1065
Lastpage :
1068
Abstract :
The Cell Broadband Engine Architecture (CBEA) is an excellent architecture for high performance distributed computing and multimedia processing. While the Cell/BE processor is capable of high definition H.264 encoding, there are still no such implementations available. In this paper, we present a parallel implementation of a HD H.264 encoder on this heterogeneous nine cores processor. First we implement a real time SD encoder on a single SPU by optimizing motion estimation algorithm, DMA transfers etc. Then we propose a pipelined parallel encoding algorithm for multicore processors, and use this algorithm to get a real time HD H.264 encoder (1920times1080@31fps) by using eight SPEs (58 fps on 16 SPEs).
Keywords :
microprocessor chips; motion estimation; parallel architectures; video coding; Cell broadband engine architecture; H.264 encoding; distributed computing; heterogeneous nine cores processor; motion estimation algorithm; multicore processors; multimedia processing; parallel HD encoding; pipelined parallel encoding algorithm; Computer architecture; Concurrent computing; Decoding; Encoding; Engines; High definition video; Instruction sets; MPEG 4 Standard; Memory management; Multicore processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
Type :
conf
DOI :
10.1109/ISCAS.2009.5117943
Filename :
5117943
Link To Document :
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