Title :
The electrical characteristics analysis of SiOxNy ARC for sub-0.17· ·Gigabit DRAM
Author :
Lee, Chi-Hoon ; Son, Nak-Jin ; Hong, Sun-Cheol ; Lee, Seung-Moo ; Park, Dong-Gun ; Jang, Won-Hee ; An, Tae-Hyun ; Lee, Wonshik
Author_Institution :
DRAM Process Archit. Team, Samsung Electron. Co., Ltd, Kyungki-Do, South Korea
Abstract :
When forming microscopic patterns in sub-0.17· ·process, in order to secure stable DOF margin at photo lithography, inorganic SiOxNy is often used for antireflective coating (ARC) for patterning line and contact hole through depositing plasma CVD method. In our gigabit process, SiOx Ny ARC is also being used for gate fabrication in deep-UV lithography. We´ve been leaving ARC on gate in order to secure insulation margin between gate and SAC (Self Aligned Contact) poly-Si pad. However there have occasionally been malfunctions in devices due to the generation of leakage current through ARC on gate between SAC pads. In this paper we discuss never-been-reported leakage current behaviors due to remained SiOxNy ARC on gate in sub-0.17· ·gigabit process with a point of view of the effect of process parameters (the high frequency (HF) power of ARC deposition, metal contamination and implanted phosphorus ions) and the method of improving failure
Keywords :
DRAM chips; antireflection coatings; leakage currents; plasma CVD coatings; silicon compounds; ultraviolet lithography; 0.17 micron; SiOxNy antireflective coating; SiON; deep-UV lithography; depth of focus; electrical characteristics; gate fabrication; gigabit DRAM; leakage current; plasma CVD; polysilicon pad; self-aligned contact; Coatings; Electric variables; Fabrication; Frequency; Hafnium; Insulation; Leakage current; Lithography; Microscopy; Plasma stability;
Conference_Titel :
Semiconductor Device Research Symposium, 2001 International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-7432-0
DOI :
10.1109/ISDRS.2001.984433
