The design of a reconfigurable continuous-flow mixed-radix FFT processor

Author

Jacobson, Anthony T. ; Truong, Dean N. ; Baas, Bevan M.

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA

fYear

2009

fDate

24-27 May 2009

Firstpage

1133

Lastpage

1136

Abstract

The design of a highly configurable continuous flow mixed-radix (CFMR) fast Fourier transform (FFT) processor is presented. It computes fixed-point complex FFTs and inverse FFTs (IFFTs), and utilizes a flexible addressing scheme to enable runtime configuration of the FFT length from 16-points to 4096-points. A configurable block floating point (BFP) unit increases numerical performance. Compared to a floating point Matlab FFT function, the accuracy of the proposed architecture is 80 dB for a 64-point FFT and 74 dB for a 1024-point FFT with random complex input data.

Keywords

fast Fourier transforms; microprocessor chips; signal processing; configurable block floating point unit; floating point Matlab FFT function; inverse fast Fourier transform processor; mixed-radix FFT processor; reconfigurable continuous-flow processor; Computer architecture; Fast Fourier transforms; Flexible printed circuits; Jacobian matrices; Memory architecture; OFDM modulation; Read only memory; Read-write memory; Runtime; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on

Conference_Location

Taipei

Print_ISBN

978-1-4244-3827-3

Electronic_ISBN

978-1-4244-3828-0

Type

conf

DOI

10.1109/ISCAS.2009.5117960

Filename

5117960