Response Dependent Condensation based macromodeling for linear time varying high speed VLSI interconnects

This paper presents a novel approach for model order reduction of linear time varying system based on Response Dependent Condensation (RDC). The proposed scheme is developed through introducing RDC to time-varying transfer functions. This scheme does not require solution of large system of equations to construct a basis for the time-varying moments. Instead, it computes such a basis through time-domain integration of the corresponding linear time-varying differential algebraic equations. Simulation results show that the effectiveness of the proposed scheme. Significant reduction in CPU time is achieved as the size of the reduced equations is much less than that of the original system.