DocumentCode
2256847
Title
Towards an automated framework for task scheduling
Author
Dubois, Martin ; Boukadoum, Mounir
Author_Institution
DI, Univ. du Quebec a Montreal, Montreal, ON, Canada
fYear
2010
fDate
19-22 Dec. 2010
Firstpage
479
Lastpage
482
Abstract
The ongoing shrinkage of semiconductor geometries allows for increasingly higher system-on-chip (SoC) densities, with more and more on-chip processors. As a result, task scheduling has become an important concern in system design and research in this area has produced substantial and diversified knowledge. This paper addresses the issue of how to effectively represent and use this knowledge in the context of design automation tools. A new methodology based on functional concept analysis is presented that structures the available task scheduling knowledge for optimal application to multiprocessor SoC design.
Keywords
logic design; multiprocessing systems; processor scheduling; system-on-chip; design automation tools; functional concept analysis; multiprocessor SoC design; on-chip processor; semiconductor geometry shrinkage; system design; system-on-chip density; task scheduling; task scheduling knowledge; Annealing; Machine learning algorithms; Processor scheduling; Program processors; Scheduling; Architecture exploration; Concept lattice; Heterogeneous systems; Homogeneous systems; Knowledge; List heuristics; Scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics (ICM), 2010 International Conference on
Conference_Location
Cairo
Print_ISBN
978-1-61284-149-6
Type
conf
DOI
10.1109/ICM.2010.5696193
Filename
5696193
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