Quintuple ramp up slope by implementing cross-functional, self-directed work teams

The 8-inch Advanced Semiconductor Line (ACL) in Essonnes-Corbeil, France is jointly run by Siemens and IBM with 16 MB DRAMs as the main product. Due to the increasing demand in 16 MB chips, it was decided to ramp up the line capacity by 70% between January and July 96. Although the tool installation happened as planned, the increase in daily going rate (DGR) was by a factor of 2 to 3 too small to meet the aggressive chips out plan for 96. A line analysis showed that the ramp up performance was mainly restricted by two reasons: First not reacting fast enough to line pinch points and second not synchronizing the “4 partners” (workforce, wafer flow, tool-set and process/business procedures) in an optimized way. To overcome those limitations, it was decided to install for each technology so-called productivity teams, which consist of a cross-functional selection of operators, technicians and engineers. The teams are responsible for problem localization as well as definition, installation and follow-ups of action plans, decision trees and check points on a daily basis as well as long term problem analysis. The empowerment of this low hierarchical workforce resulted in a much faster response to line problems and the cross-functional character of the teams propelled the synchronisation of the 4 partners. Two weeks after implementing the teams the line ramp up slope was increased by a factor of 5 and reached a peak value of DGR ramp up speed corresponding to 700 WSPW per month. 6 weeks after the introduction of productivity teams the DGR performance had recovered to the plan and is now (August 96) 3% above plan so that ACL expects to deliver significantly above the 96 plan