DocumentCode :
2257306
Title :
Using Speculative Functional Units in high level synthesis
Author :
Del Barrio, Alberto A. ; Molina, Maria C. ; Mendias, Jose M. ; Hermida, Roman ; Memik, Seda Ogrenci
Author_Institution :
Dipt. Arquitectura de Comput. y Autom., Univ. Complutense de Madrid, Madrid, Spain
fYear :
2010
fDate :
8-12 March 2010
Firstpage :
1779
Lastpage :
1784
Abstract :
Speculative Functional Units (SFUs) enable a new execution paradigm for High Level Synthesis (HLS). SFUs are arithmetic functional units that operate using a predictor for the carry signal, which reduces the critical path delay. The performance of these units is determined by the success in the prediction of the carry value, i.e. the hit rate of the prediction. Hence SFUs reduce critical path at a low cost, but they cannot be used in HLS with the current techniques. In order to use them, it is necessary to include hardware support to recover from mispredictions of the carry signals. In this paper, we present techniques for designing a datapath controller for seamless deployment of SFUs in HLS. We have developed two techniques for this goal. The first approach stops the execution of the entire datapath for each misprediction and resumes execution once the correct value of the carry is known. The second approach decouples the functional unit suffering from the misprediction from the rest of the datapath. Hence, it allows the rest of the SFUs to carry on execution and be at different scheduling states at different times. Experiments show that it is possible to reduce execution time by as much as 38% and by 33% on average.
Keywords :
high level synthesis; optimisation; parallel programming; processor scheduling; HLS; SFU; arithmetic functional units; critical path delay; datapath controller; high level synthesis; speculative functional units; Adders; Arithmetic; Circuits; Costs; Delay; Design optimization; Dynamic scheduling; Hardware; High level synthesis; Resumes; Dynamic scheduling; HLS; speculation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
Conference_Location :
Dresden
ISSN :
1530-1591
Print_ISBN :
978-1-4244-7054-9
Type :
conf
DOI :
10.1109/DATE.2010.5457102
Filename :
5457102
Link To Document :
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