• DocumentCode
    2257529
  • Title

    FPGA implementation of a general purpose HMM processor based on token passing algorithm

  • Author

    Bianchi, D. ; Cardarilli, Gian Carlo ; Del Re, A. ; Malatesta, A. ; Re, Matteo

  • Author_Institution
    Dept. of Electron. Eng., Rome Tor Vergata Univ., Italy
  • Volume
    1
  • fYear
    2005
  • fDate
    28 Aug.-2 Sept. 2005
  • Abstract
    In this paper, the FPGA implementation of a general purpose hidden Markov model (HMM) processing unit is illustrated. The HMM is based on the token passing algorithm, resulting in a simplified hardware topology, since a typical HMM based system can be seen as a number of HMM processors working in parallel. Each HMM processor has been designed as a parametric unit, reusable in a number of applications (speech recognition, protein structure prediction, control systems, etc). A VHDL RTL model has been developed and results obtained for the implementation on a Xilinx VirtexII FPGA are discussed.
  • Keywords
    field programmable gate arrays; hardware description languages; hidden Markov models; microprocessor chips; parallel architectures; protocols; VHDL RTL model; Xilinx VirtexII FPGA system; general purpose HMM processor; general purpose hidden Markov model processing unit; parallel processing; simple hardware topology; token passing algorithm; Field programmable gate arrays; Hidden Markov models;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuit Theory and Design, 2005. Proceedings of the 2005 European Conference on
  • Print_ISBN
    0-7803-9066-0
  • Type

    conf

  • DOI
    10.1109/ECCTD.2005.1522966
  • Filename
    1522966