DocumentCode
2257538
Title
A compact digital amplitude modulator in 90nm CMOS
Author
Chironi, V. ; Debaillie, B. ; Baschirotto, A. ; Craninckx, J. ; Ingels, M.
Author_Institution
Dept.of Innovation Eng., Univ. of Salento, Lecce, Italy
fYear
2010
fDate
8-12 March 2010
Firstpage
702
Lastpage
705
Abstract
This paper presents a 90 nm CMOS digital amplitude modulator for polar transmitter. It reaches an output power of -2.5 dBmRMS using a WLAN OFDM 64QAM modulation at 2.45GHz achieving -26.1 dB EVM and 18% efficiency. To reduce the aliases due to the discrete-time to continuous-time conversion a 2-fold interpolation has been implemented. The amplitude modulator has a segmented architecture. This results in a very compact 0.007 mm2 chip area.
Keywords
CMOS integrated circuits; OFDM modulation; amplitude modulation; interpolation; wireless LAN; 2-fold interpolation; CMOS digital amplitude modulator; WLAN OFDM 64QAM modulation; compact digital amplitude modulator; continuous-time conversion; discrete-time conversion; frequency 2.54 GHz; polar transmitter; size 90 nm; Amplitude modulation; Bandwidth; Clocks; Digital modulation; Interpolation; OFDM modulation; Power amplifiers; Power generation; Radiofrequency amplifiers; Transmitters;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4244-7054-9
Type
conf
DOI
10.1109/DATE.2010.5457112
Filename
5457112
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