• DocumentCode
    2257563
  • Title

    PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks

  • Author

    Chan, Johnnie ; Hendry, Gilbert ; Biberman, Aleksandr ; Bergman, Keren ; Carloni, Luca P.

  • Author_Institution
    Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
  • fYear
    2010
  • fDate
    8-12 March 2010
  • Firstpage
    691
  • Lastpage
    696
  • Abstract
    Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power efficient communications both on- and off-chip. Since optical devices are fundamentally different from conventional electronic interconnect technologies, new design methodologies and tools are required to exploit the potential performance benefits in a manner that accurately incorporates the physically different behavior of photonics. We introduce PhoenixSim, a simulation environment for modeling computer systems that incorporates silicon nanophotonic devices as interconnection building blocks. PhoenixSim has been developed as a cross-discipline platform for studying photonic interconnects at both the physical-layer level and at the architectural and system levels. The broad scope at which modeled systems can be analyzed with PhoenixSim provides users with detailed information into the physical feasibility of the implementation, as well as the network and system performance. Here, we describe details about the implementation and methodology of the simulator, and present two case studies of silicon nanophotonic-based networks-on-chip.
  • Keywords
    elemental semiconductors; integrated circuit interconnections; nanophotonics; network-on-chip; silicon; PhoenixSim; Si; chip-scale photonic interconnection networks; computer systems; interconnection building blocks; networks-on-chip; optical devices; physical-layer analysis; silicon nanophotonic technology; Analytical models; Bandwidth; Computational modeling; Design methodology; Fabrics; Multiprocessor interconnection networks; Optical devices; Photonics; Power system interconnection; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
  • Conference_Location
    Dresden
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-4244-7054-9
  • Type

    conf

  • DOI
    10.1109/DATE.2010.5457114
  • Filename
    5457114