Block-matching-based CMOS optical flow sensor using only-nearest-neighbor computation

Author

Fukuoka, Yudai ; Shibata, Tadashi

Author_Institution

Dept. of Frontier Inf., Univ. of Tokyo, Tokyo, Japan

fYear

2009

fDate

24-27 May 2009

Firstpage

1485

Lastpage

1488

Abstract

A block-matching-based CMOS optical flow sensor architecture has been developed for real-time processing of moving images. In this architecture, an array of SIMD (single instruction multiple data) units calculate SAD (sum of absolute difference) values using only data from nearest-neighbor-units. As a result, it has become possible to carry out the block matching algorithm very efficiently with a minimal complexity in the interconnect structure. The chip was designed in a 0.18-mum 5-metal CMOS technology and sent to fabrication, and the correct operation of the entire system was confirmed by nanosim simulation. The chip is expected to perform at a frame rate about 1300 frame/sec.

Keywords

CMOS image sensors; image matching; image motion analysis; image sequences; SIMD; block-matching-based CMOS optical flow sensor; interconnect structure; moving image processing; nanosim simulation; only-nearest-neighbor computation; single instruction multiple data; size 0.18 mum; CMOS image sensors; Circuits; Computer architecture; Concurrent computing; Image motion analysis; Image sensors; Optical computing; Optical sensors; Pixel; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on

Conference_Location

Taipei

Print_ISBN

978-1-4244-3827-3

Electronic_ISBN

978-1-4244-3828-0

Type

conf

DOI

10.1109/ISCAS.2009.5118048

Filename

5118048