Title :
Silicon nanowire memory using surface charging and its operation analysis by scanning Maxwell-stress microcopy (SMM)
Author :
Matsukawa, T. ; Kanemaru, S. ; Masahara, M. ; Nagao, M. ; Itoh, J.
Author_Institution :
Nanoelectronics Res. Inst., Agency of Ind. Sci. & Technol., Ibaraki, Japan
Abstract :
Charge-sensitive silicon nanowires with in-plane side gates for charging control were fabricated by simple processes with only a single step lithography, and the electrical characteristics as the memory was evaluated. In order to investigate relationship between charging induced by the side gate and the memory operation, surface potential of the device in the memory operation sequence was evaluated by means of scanning Maxwell-stress microscopy (SMM)
Keywords :
elemental semiconductors; integrated circuit technology; integrated memory circuits; nanotechnology; scanning tunnelling microscopy; silicon; single electron transistors; surface charging; Maxwell-stress microscopy; Si; charge-sensitive Si nanowires; charging control; in-plane side gates; memory operation; memory operation sequence; single step lithography; surface potential; Electronic mail; Lithography; Nanoelectronics; Nanoscale devices; Silicon; Surface charging; Surface topography; Voltage; Wire; Writing;
Conference_Titel :
Semiconductor Device Research Symposium, 2001 International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-7432-0
DOI :
10.1109/ISDRS.2001.984517
