• DocumentCode
    2257870
  • Title

    Dynamic data stability in SRAM cells and its implications on data stability tests

  • Author

    Sharifkhani, M. ; Jahinuzzaman, S.M. ; Sachdev, M.

  • Author_Institution
    Dept. of ECE, Waterloo Univ., Ont.
  • fYear
    2006
  • fDate
    2-4 Aug. 2006
  • Abstract
    The paper discusses the concept of dynamic data stability in the SRAM cells. It is shown that the criteria for the absolute static data stability in an SRAM cell is a sub-set of its dynamic data stability. Hence, test methods that are based on dynamic stress of the cell have limited success in discovering the defective cells. Hammer test, for example, fails to discover the faults in an SRAM cell when it is data stable in the dynamic sense but not statically data stable. It will be shown that a long cell access time can detect such faults as it reduces the effect of the dynamic data stability. This method can be combined with stressed cell methods to achieve higher accuracy. Simulation results in a 130nm CMOS technology confirm the method with a good success
  • Keywords
    CMOS memory circuits; SRAM chips; circuit stability; 130 nm; CMOS technology; SRAM cells; data stability tests; defective cells; dynamic data stability; dynamic stress; fault detection; static data stability; CMOS technology; Circuit faults; Circuit noise; Fault detection; Feedback; Noise figure; Random access memory; Stability criteria; Testing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Memory Technology, Design, and Testing, 2006. MTDT '06. 2006 IEEE International Workshop on
  • Conference_Location
    Taipei
  • ISSN
    1087-4852
  • Print_ISBN
    0-7695-2572-5
  • Type

    conf

  • DOI
    10.1109/MTDT.2006.12
  • Filename
    1654581