Title :
Sort Middle Pipeline Architecture for Efficient 3D Rendering
Author :
Falchetto, M. ; Barone, M. ; Pau, D. ; Hill, S. ; Goda, S.
Author_Institution :
Adv. Syst. Technol., STMicroelectronics, Milan
Abstract :
This paper presents a high performance fixed function 3D graphics pipeline based on sort-middle computing paradigm. The proposed architecture implements the full specification of the OpenGL|ES 1.1 open standard and is specifically designed for a cost effective integration on consumer devices, in particular on low-power mobile ones.
Keywords :
rendering (computer graphics); 3D rendering; OpenGL|ES 1.1 open standard; sort middle pipeline architecture; sort-middle computing paradigm; Bandwidth; Buffer storage; Computer architecture; Costs; Engines; Geometry; Graphics; Layout; Pipelines; Rendering (computer graphics);
Conference_Titel :
Consumer Electronics, 2007. ICCE 2007. Digest of Technical Papers. International Conference on
Conference_Location :
Las Vegas, NV
Print_ISBN :
1-4244-0763-X
Electronic_ISBN :
1-4244-0763-X
DOI :
10.1109/ICCE.2007.341535
