DocumentCode
2258264
Title
Fully-depleted SOI process optimization for 60 nm CMOS transistors
Author
Fenouillet-Beranger, C. ; Fruleux, F. ; Talbot, A. ; Tosti, L. ; Palla, R. ; Casse, M. ; Carriere, N. ; Grouillet, A. ; Raynaud, C. ; Giffard, B. ; Skotnicki, T.
Author_Institution
LETI, CEA, Grenoble, France
fYear
2003
fDate
29 Sept.-2 Oct. 2003
Firstpage
31
Lastpage
32
Abstract
In this paper, we propose to study the main important technological parameters (Tsi, film doping and gate oxide influence) to give process orientations for 60nm gate lengths CMOS transistors optimization.
Keywords
CMOS integrated circuits; MOSFET; elemental semiconductors; niobium; semiconductor doping; semiconductor thin films; silicon; silicon-on-insulator; 60 nm; CMOS transistors; SOI; Si-SiO2; Si:Nb; film doping; gate oxide influence; optimization; CMOS integrated circuits; MOSFETs; Niobium; Semiconductor device doping; Semiconductor films; Silicon; Silicon on insulator technology;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2003. IEEE International
ISSN
1078-621X
Print_ISBN
0-7803-7815-6
Type
conf
DOI
10.1109/SOI.2003.1242885
Filename
1242885
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