Title :
Modulo 2n - 1 multiplication/sum-of-squares units
Author :
Adamidis, D. ; Vergos, H.T.
Author_Institution :
Multimedia & Commun. Group, Atmel Corp., San Jose, CA, USA
fDate :
28 Aug.-2 Sept. 2005
Abstract :
Several applications profit from the use of a residue number system (RNS). Moduli of the 2n - 1 form are among the most commonly used in such systems in which the multiplication and sum-of-squares operations are commonly met. These operations are currently performed using distinct design units and consecutive machine cycles. In this paper, we propose two architectures for modulo 2n - 1 units that perform either the X × Y or X2 + Y2 operation depending on the value of a control signal.
Keywords :
network synthesis; redundant number systems; residue number systems; control signal value; modulo 2n-1 multiplication; residue number system; sum-of-squares units; Computer architecture; Concurrent computing; Delay; Digital arithmetic; Digital filters; Digital modulation; Digital signal processing; Digital signal processors; Electronic mail; Filtering;
Conference_Titel :
Circuit Theory and Design, 2005. Proceedings of the 2005 European Conference on
Print_ISBN :
0-7803-9066-0
DOI :
10.1109/ECCTD.2005.1523013
