Architecture for model-based UHF RFID system design verification

Verification based on prototypes in the target application environment proved to be reliable but also costly feedback. To decrease the design time and effort in early development stages a more frequent evaluation is supported by models. Assumption on UHF RFID specific constraints brings advantage by the possibility to extend models to higher abstraction levels and to increase the simulation speed. Using advanced simulation techniques in the system level modeling achieves more accurate results both for ASIC developers and for system integrators.