Title :
DDFS with new sinusoid approximation based on harmonics removal
Author_Institution :
Dept. of Sci. & Eng., Kansai Univ., Suita, Japan
Abstract :
This paper proposes a new sine wave approximation method and the proposed method is used as the phase amplitude converter of direct digital frequency synthesizer (DDFS). As the circuit size of the proposed method grows exponentially in proportion to the purity of the generated signal, an error compensation ROM is combined to improve the signal purity while keeping the circuit size small. VHDL simulations are conducted to test the DDFS and the results show that the circuit size of the proposed DDFS is about 40% smaller than that of the conventional DDFS.
Keywords :
direct digital synthesis; hardware description languages; harmonics suppression; read-only storage; DDFS; VHDL simulation; direct digital frequency synthesizer; error compensation ROM; harmonics removal; phase amplitude converter; sinusoid approximation; Adders; Approximation methods; Circuit testing; Clocks; Digital-to-frequency converters; Frequency synthesizers; Piecewise linear approximation; Read only memory; Registers; Signal generators;
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
DOI :
10.1109/ISCAS.2009.5118114