DocumentCode :
2259356
Title :
Impact of non-vertical sidewall on sub-50 nm FinFET
Author :
Wu, Xusheng ; Chan, Philip C H ; Chan, Mansun
Author_Institution :
Dept. of EEE, Hong Kong Univ. of Sci. & Technol., China
fYear :
2003
fDate :
29 Sept.-2 Oct. 2003
Firstpage :
151
Lastpage :
152
Abstract :
In this paper, we present a study on the impact of fin thickness variation on the characteristics of a fin FET. By performing 3-D simulation, device electrical performance fluctuation with respect to fin thickness variation is calibrated. A guideline on the process tolerance for a given device performance requirement is also provided.
Keywords :
field effect transistors; semiconductor device models; 3-D simulation; 50 nm; FinFET; calibration; electrical performance fluctuation; thickness variation; FETs; Semiconductor device modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, 2003. IEEE International
ISSN :
1078-621X
Print_ISBN :
0-7803-7815-6
Type :
conf
DOI :
10.1109/SOI.2003.1242933
Filename :
1242933
Link To Document :
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