Architecture of asynchronous cellular processor array for image skeletonization

This paper presents a design and implementation of an application specific cellular processor array (CPA) that executes binary image skeletonization on a hexagonal lattice. The designed CPA operates in an asynchronous mode, employing ´pixel per processor´ concept, which provides significant performance increase in image processing operations that exploit ´wave-propagation´ or ´grassfire´ transformation approach. A proof-of-concept design has been implemented and evaluated in FPGA and results are presented and discussed.