From transistors to MEMS: Throughput-aware power gating in CMOS circuits

In this paper we study the effectiveness of two power gating methods - transistor switches and MEMS switches - in reducing the power consumption of a design with a certain target throughput. Transistor switches are simple, but have fundamental limitations in their effectiveness. MEMS switches, with zero leakage in the off state, have achieved much focus over the past decade in the RF field, but have only very recently been explored in the context of power gating. In this paper we study both methods in conjunction with voltage scaling and show that MEMS switches are the superior choice over a wide range of target throughputs, especially low-throughput applications such as wireless sensor networks and biomedical implants. We also show that the architectural choices and operating conditions in a throughput-aware design can be profoundly different when using MEMS switches as opposed to transistor switches. For instance, while transistor switches favor smaller and slower architectures, the MEMS switches favor larger and faster designs when the target throughput is low. Moreover, while the optimal operating voltage of a transistor-switched design resides in the subthreshold region, that of a MEMS-switched design can be above or near the threshold voltage. To prove this, we provide both a mathematical analysis and experimental results from four different FFT architectures.