• DocumentCode
    2260260
  • Title

    Towards Online Application Cache Behaviors Identification in CMPs

  • Author

    Jia, Xiaomin ; Jiang, Jiang ; Zhao, Tianlei ; Qi, Shubo ; Zhang, Minxuan

  • Author_Institution
    Sch. of Comput., Nat. Univ. of Defense Technol., Changsha, China
  • fYear
    2010
  • fDate
    1-3 Sept. 2010
  • Firstpage
    1
  • Lastpage
    8
  • Abstract
    On chip multiprocessors (CMPs) platforms, multiple co-scheduled applications can severely degrade performance and quality of service (QoS) when they contend for last-level cache (LLC) resources. Whether an application will impose destructive interference on co-scheduled applications is largely dependent on its own inherent cache access behavior characteristics. In this work, we first present case studies that show how inter-application interferences result in undesirable performance in both shared and private cache based LLC designs. We then propose a new online approach for application cache behavior identification on the basis of detailed simulation and analysis with SPEC CPU2006 benchmarks. We demonstrate that our approach can more concisely identify application cache behaviors. Moreover, the proposed approach can be implemented directly in hardware to dynamically identify the application cache behaviors at runtime. Finally, we show with two case studies that how the proposed approach can be adopted by both shared and private based cache sharing mechanisms, i.e. cache partitioning algorithms (CPAs) and cache spilling techniques, for more concise cache resource management.
  • Keywords
    cache storage; processor scheduling; quality of service; resource allocation; shared memory systems; CMP; cache access behavior; cache partitioning algorithm; cache resource management; cache spilling technique; chip multiprocessor platform; interapplication interference; last-level cache resource; multiple coscheduled applications; online application cache behavior identification; private cache; quality of service; shared cache; application cache behaviors; cache partitioning algorithms; chip multi-processors (CMPs); last-level caches (LLC); spilling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computing and Communications (HPCC), 2010 12th IEEE International Conference on
  • Conference_Location
    Melbourne, VIC
  • Print_ISBN
    978-1-4244-8335-8
  • Electronic_ISBN
    978-0-7695-4214-0
  • Type

    conf

  • DOI
    10.1109/HPCC.2010.12
  • Filename
    5581347