Title :
A systematic design procedure for high-speed opamp performance optimization
Author :
Perenzoni, Matteo ; Malfatti, Mattia ; De Nisi, Fabrizio ; Stoppa, David ; Baschirotto, Andrea
Author_Institution :
Microsystems Div., ITC-IRST, Povo, Italy
fDate :
28 Aug.-2 Sept. 2005
Abstract :
This work introduces a design procedure for two-stage class AB opamps which minimizes power consumption for a given specifications set. The proposed procedure has been applied to the redesign of published opamps for comparison target, demonstrating the procedure validity by improving their efficiency. The systematic procedure is then applied to an opamp that will be part of the readout of an imager. The opamp is designed in a 0.35 μm 3.3V standard CMOS technology and exhibits GBW ≡49MHz, SR ≡ 74V/μs, 0.1% settling time of 43ns, consuming only 0.87mW with a die area of 0.0053mm2.
Keywords :
CMOS integrated circuits; integrated circuit design; operational amplifiers; power consumption; 0.35 micron; 0.87 mW; 3.3 V; 43 ns; 49 MHz; CMOS technology; high-speed opamp performance optimization; imager readout; power consumption; systematic design; two-stage class AB opamp; CMOS analog integrated circuits; CMOS image sensors; CMOS technology; Design optimization; Dynamic range; Energy consumption; Poles and zeros; Resistors; Sensor arrays; Voltage;
Conference_Titel :
Circuit Theory and Design, 2005. Proceedings of the 2005 European Conference on
Print_ISBN :
0-7803-9066-0
DOI :
10.1109/ECCTD.2005.1523102
