NEUDEM: neural network based decision making for generating tests in digital circuits

The paper presents a neural network based automatic test pattern generation methodology for combinational circuits. We consider 2- and 3- valued Hopfield models to describe basic gates such as AND, OR, NAND, NOR and XOR. These gate models, in turn, transform the structural behavior of a logic circuit into an analogous neural network (NN) model. The test generation problem is then formulated as an energy minimization problem of a NN model for which techniques such as gradient descent and simulated annealing can be used. In order to develop a test set we have used the concepts of simulated annealing and the topological search proposed in the path oriented decision making (PODEM) algorithm. An error correction and translation (ECAT) circuit is used to illustrate the method