DocumentCode
2261474
Title
Properties of maximally dominating faults
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., W. Lafayette, IN, USA
fYear
2004
fDate
15-17 Nov. 2004
Firstpage
106
Lastpage
111
Abstract
We study properties of a subset of single stuck-at faults defined based on dominance relations and referred to as maximally dominating faults. These faults were shown to be effective in n-detection test generation and in diagnosis. The properties described here can be useful in additional applications. We suggest two such applications. The first is weighted random pattern generation using three weights, 0, 0.5 and 1. The second application is static test compaction that drops unnecessary tests from a given test set in order to reduce its size.
Keywords
automatic test pattern generation; electronic engineering computing; fault simulation; integrated circuit testing; logic testing; random number generation; fault diagnosis; maximally dominating faults; n-detection test generation; static test compaction; stuck-at faults; test set size reduction; weighted random pattern generation; Built-in self-test; Circuit faults; Circuit testing; Cities and towns; Compaction; Fault detection; Fault diagnosis;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2004. 13th Asian
ISSN
1081-7735
Print_ISBN
0-7695-2235-1
Type
conf
DOI
10.1109/ATS.2004.70
Filename
1376544
Link To Document