Understanding loading effects of RC uniform interconnects

In this paper, loading effects associated with uniform RC interconnects are analytically modeled to deeply understand the effects that contribute to their input admittance. A simple reduced-order model is developed and shown to be accurate by means of simulations on a 65-nm CMOS technology. The resulting analytical expression of the model permits a deeper understanding of the loading effects of RC uniform wires on the driving circuit (e.g., the previous repeater). The model is also simple enough to be used in fast and accurate estimations in automated CAD tools. Interestingly, analysis allows for identifying a new circuit effect, the so-called ldquocapacitive shieldingrdquo effect. This effect consists in the reduction of the effective resistance (and capacitance) that is seen at the input of the interconnect, due to the wire and load capacitances. Interestingly, the capacitive effect is shown to be the dual of the well-known ldquoresistive shieldingrdquo effect associated with RC interconnects, which determines a reduction in the effective capacitance due to the wire resistance.