• DocumentCode
    2263292
  • Title

    An improved technique for reducing false alarms due to soft errors

  • Author

    Kundu, Sandip ; Polian, Ilia

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Massachusets Univ., Amherst, MA
  • fYear
    0
  • fDate
    0-0 0
  • Abstract
    A significant fraction of soft errors in modern microprocessors has been reported to never lead to a system failure. Any concurrent error detection scheme that raises alarm every time a soft error is detected is not well heeded because most of these alarms are false and responding to them will affect system performance negatively. This paper improves state of the art in detecting and preventing false alarms. Existing techniques are enhanced by a methodology to handle soft errors on address bits. Furthermore, we demonstrate benefit of false alarm identification in implementing a roll-back recovery system by first calculating the optimum check pointing interval for a roll-back recovery system and then showing that the optimal number of check-points decreases by orders of magnitude when exclusion techniques are used even if the implementation of exclusion technique is not perfect
  • Keywords
    checkpointing; error detection; fault tolerance; microprocessor chips; check pointing interval; error detection; exclusion techniques; false alarm identification; roll-back recovery system; soft errors; Art; CMOS logic circuits; CMOS technology; Computer aided instruction; Error correction; Microprocessors; Redundancy; Registers; System performance; USA Councils;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International
  • Conference_Location
    Lake Como
  • Print_ISBN
    0-7695-2620-9
  • Type

    conf

  • DOI
    10.1109/IOLTS.2006.10
  • Filename
    1655528