DocumentCode :
2263410
Title :
Scheduling communication on an SMP node parallel machine
Author :
Falsafi, Babak ; Wood, David A.
Author_Institution :
Dept. of Comput. Sci., Wisconsin Univ., Madison, WI, USA
fYear :
1997
fDate :
1-5 Feb 1997
Firstpage :
128
Lastpage :
138
Abstract :
Distributed-memory parallel computers and networks of workstations (NOWs) both rely on efficient communication over increasingly high-speed networks. Software communication protocols are often the performance bottleneck. Several current and proposed parallel systems address this problem by dedicating one general-purpose processor in a symmetric multiprocessor (SMP) node specifically for protocol processing. This scheduling convention reduces communication latency and increases effective bandwidth but also reduces the peak performance since the dedicated processor no longer performs computation. In this paper, we study a parallel machine with SMP nodes and compare two protocol processing policies: Fixed, which uses a dedicated protocol processor; and Floating, where all processors perform both computation and protocol processing. The results from synthetic microbenchmarks and five macrobenchmarks show that: (i) a dedicated protocol processor benefits light-weight protocols much more than heavy-weight protocols; (ii) fixed improves performance over Floating when communication becomes the bottleneck, which is more likely when the application is very communication-intensive, overheads are very high, or there are multiple (i.e., more than two) processors per node; (iii) a system with optimal cost-effectiveness is likely to include a dedicated protocol processor, at least for light-weight protocols
Keywords :
distributed memory systems; performance evaluation; processor scheduling; protocols; workstations; SMP node parallel machine; distributed-memory parallel computers; high-speed networks; networks of workstations; parallel systems; performance; performance bottleneck; scheduling communication; software communication protocols; symmetric multiprocessor; synthetic microbenchmarks; Computer networks; Concurrent computing; Delay; Distributed computing; High-speed networks; Parallel machines; Processor scheduling; Protocols; Software performance; Workstations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High-Performance Computer Architecture, 1997., Third International Symposium on
Conference_Location :
San Antonio, TX
Print_ISBN :
0-8186-7764-3
Type :
conf
DOI :
10.1109/HPCA.1997.569649
Filename :
569649
Link To Document :
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