DocumentCode
2263775
Title
DMT and DT2: two fault-tolerant architectures developed by CNES for COTS-based spacecraft supercomputers
Author
Pignol, Michel
Author_Institution
CNES, Toulouse
fYear
0
fDate
0-0 0
Abstract
COTS (commercial off-the-shelf) electronic components are attractive for space applications. However, computer designers need to solve a main problem as regards their SEE (single event effect) sensitivity. The purpose of fault tolerance studies conducted at CNES (the French Space Agency) is to prepare the space community for the significant evolution linked to the usage of COTS components. CNES has patented two fault-tolerant architectures with low recurring costs, mass and power consumption, as compared to conventional architectures as e.g. the TMR (triple modular redundancy) one. The former, referred to as DMT, is time redundancy based and minimises recurring costs. It is mainly intended for but not limited to scientific missions. The latter, referred to as DT2, is based on a structural duplex architecture with minimum duplication and is suited for high-end application missions
Keywords
aircraft computers; fault tolerant computing; mainframes; COTS components; COTS-based spacecraft supercomputers; DMT fault-tolerant architectures; DT2 fault-tolerant architectures; SEE; TMR; commercial off-the-shelf; electronic components; fault tolerance; single event effect; structural duplex architecture; time redundancy; triple modular redundancy; Application software; Computer applications; Computer architecture; Costs; Electronic components; Fault tolerance; OFDM modulation; Redundancy; Space vehicles; Supercomputers;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International
Conference_Location
Lake Como
Print_ISBN
0-7695-2620-9
Type
conf
DOI
10.1109/IOLTS.2006.24
Filename
1655550
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